By Eric Y. T. Juan, Jeffrey J. P. Tsai (auth.)
With the speedy progress of networking and high-computing energy, the call for for large-scale and intricate software program platforms has elevated dramatically. the various software program structures help or supplant human regulate of safety-critical structures akin to flight regulate structures, area travel keep watch over structures, airplane avionics keep an eye on structures, robotics, sufferer tracking structures, nuclear strength plant regulate platforms, etc. Failure of safety-critical platforms might bring about nice mess ups and lack of human existence. for that reason, software program used for security serious structures may still guard excessive insurance houses. as a way to agree to excessive insurance homes, a safety-critical procedure usually stocks assets among a number of simultaneously energetic computing brokers and needs to meet inflexible real-time constraints. in spite of the fact that, concurrency and timing constraints make the advance of a safety-critical method even more blunders companies and exhausting. The correctness of software program structures these days relies often at the paintings of checking out and debugging. trying out and debugging contain the method of de tecting, finding, examining, separating, and correcting suspected faults utilizing the runtime details of a process. even if, trying out and debugging are usually not adequate to end up the correctness of a safety-critical process. against this, static research is supported by way of formalisms to specify the approach accurately. Formal verification equipment are then utilized to end up the logical correctness of the process with recognize to the specification. Formal verifica tion offers us larger self assurance that safety-critical structures meet the specified insurance houses which will steer clear of disastrous consequences.
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Extra resources for Compositional Verification of Concurrent and Real-Time Systems
7). Therefore, MLTSs D4, D5, andD6 are all equivalent in terms ofIOT-divergence. This means that we can transform MLTS D4 into MLTS D6 using lOT-divergence equivalence. ))}. 4 IOT-AS-divergences and IOT-B-divergences We use IOT-AS-divergences and IOT-B-divergences for the analysis of ASloops and B-Ioops. IOT-AS-divergence and IOT-B-divergence are also defined in terms of IO-traces. 11 (IOT-B-divergences and IOT-AS-divergences) Let P be an MLTS (S, ~, T, Sin). • (aR, aBL 00) is an lOT-Blocking-divergence (IOT-B-divergences) of P iff 1) there exists an IO-trace Sin=aR=>-S and 2) there exists a B-Ioop s-a-ts such that aBL 00 is the IO-trace of a oo .
9 gives an example of IOT-B-divergences and 1OT-ASdivergences. ) T)OO from state So (via state Sl). )00 is the IO-trace of the AS-loop (el 7)00 from state SI (via state S2). 5 IOTFD-equivalence This section presents our IOTFD-equivalence for the analysis of deadlock and livelock. We first define deadlock equivalence and livelock equivalence. , T, Sin) be an MLTS. • Let a a =al ... an and ab =b1 ... bm be two sequences of multi sets of actions. We denote that laal =labl iff al + a2 ... + an =b1 + b2 ··.
Johnsonbaugh & Murata, 1981, Murata & Koh, 1980] developed methods for reduction and expansion of marked graphs. Reduction rules for Petri Nets and ordinary Petri Nets were presented by Lee-Kwang et. aI. , 1987]. Berthelot [Berthelot, 1986] proposed another set of reduction rules for Petri Nets. Berthelot's work incurs some further research in net-reduction techniques for concurrent and real-time systems. , 1996]. In addition, Berthelot's reduction rules have been extended to Merlin's Time Petri Nets (TPNs) as well [Sloan & Buy, 1996].